By pushing side effects to the edges and keeping our core logic pure, we gain a deterministic and secure execution trace. As a result, debugging shifts from guessing what might have happened to watching exactly what did happen, all without compromising user privacy.
Intel's 1986 ICCD paper Performance Optimizations of the 80386 reveals how tightly this was optimized. The entire address translation pipeline -- effective address calculation, segment relocation, and TLB lookup -- completes in 1.5 clock cycles:
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2-phase A* already uses many heuristics which don't always create an optimal route and still 5-10x slower.